Sub-Threshold SRAM Design in 14Nm FinFET Technology with Improved Access Time and Leakage Power

Behzad Zeinali; Jens Kargaard Madsen; Praveen Raghavan; Farshad Moradi

doi:10.1109/ISVLSI.2015.73

Sub-Threshold SRAM Design in 14Nm FinFET Technology with Improved Access Time and Leakage Power

Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi

Research output: Contribution to book/anthology/report/proceeding › Article in proceedings › Research › peer-review

11 Citations (Scopus)

Original language	English
Title of host publication	Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Number of pages	6
Volume	2015
Publisher	IEEE
Publication date	2015
Pages	74-79
ISBN (Print)	978-1-4799-8718-4
DOIs	https://doi.org/10.1109/ISVLSI.2015.73
Publication status	Published - 2015
Event	ISVLSI - Montpellier, France Duration: 8 Jul 2015 → 10 Jul 2015

Conference

Conference	ISVLSI
Country/Territory	France
City	Montpellier
Period	08/07/2015 → 10/07/2015

Series	Proceedings of the IEEE Computer Society Annual Symposium on VLSI
Volume	2015

Keywords

FinFET

Access to Document

10.1109/ISVLSI.2015.73

Cite this

@inproceedings{0e65d0babdea4da987b54e282cdd2448,

title = "Sub-Threshold SRAM Design in 14Nm FinFET Technology with Improved Access Time and Leakage Power",

keywords = "FinFET",

author = "Behzad Zeinali and Madsen, {Jens Kargaard} and Praveen Raghavan and Farshad Moradi",

year = "2015",

doi = "10.1109/ISVLSI.2015.73",

language = "English",

isbn = "978-1-4799-8718-4 ",

volume = "2015",

series = "Proceedings of the IEEE Computer Society Annual Symposium on VLSI",

publisher = "IEEE",

pages = "74--79",

booktitle = "Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI)",

note = "ISVLSI ; Conference date: 08-07-2015 Through 10-07-2015",

}

Zeinali, B, Madsen, JK, Raghavan, P & Moradi, F 2015, Sub-Threshold SRAM Design in 14Nm FinFET Technology with Improved Access Time and Leakage Power. in Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI). vol. 2015, IEEE, Proceedings of the IEEE Computer Society Annual Symposium on VLSI, vol. 2015, pp. 74-79, ISVLSI, Montpellier, France, 08/07/2015. https://doi.org/10.1109/ISVLSI.2015.73

Sub-Threshold SRAM Design in 14Nm FinFET Technology with Improved Access Time and Leakage Power. / Zeinali, Behzad; Madsen, Jens Kargaard; Raghavan, Praveen et al.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI). Vol. 2015 IEEE, 2015. p. 74-79 (Proceedings of the IEEE Computer Society Annual Symposium on VLSI, Vol. 2015).

Research output: Contribution to book/anthology/report/proceeding › Article in proceedings › Research › peer-review

TY - GEN

T1 - Sub-Threshold SRAM Design in 14Nm FinFET Technology with Improved Access Time and Leakage Power

AU - Zeinali, Behzad

AU - Madsen, Jens Kargaard

AU - Raghavan, Praveen

AU - Moradi, Farshad

PY - 2015

Y1 - 2015

KW - FinFET

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DO - 10.1109/ISVLSI.2015.73

M3 - Article in proceedings

SN - 978-1-4799-8718-4

VL - 2015

T3 - Proceedings of the IEEE Computer Society Annual Symposium on VLSI

SP - 74

EP - 79

BT - Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

PB - IEEE

T2 - ISVLSI

Y2 - 8 July 2015 through 10 July 2015

ER -