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Energy-Efficient Advanced Data Encryption System Using Spin-Based Computing-in-Memory Architecture

Research output: Contribution to journal/Conference contribution in journal/Contribution to newspaper › Journal article › Research › peer-review

Standard

Energy-Efficient Advanced Data Encryption System Using Spin-Based Computing-in-Memory Architecture. / Nisar, Arshid; Dhull, Seema; Shreya, Sonal et al.
In: IEEE Transactions on Electron Devices, Vol. 69, No. 4, 04.2022, p. 1736-1742.

Research output: Contribution to journal/Conference contribution in journal/Contribution to newspaper › Journal article › Research › peer-review

Harvard

Nisar, A, Dhull, S, Shreya, S & Kaushik, BK 2022, 'Energy-Efficient Advanced Data Encryption System Using Spin-Based Computing-in-Memory Architecture', IEEE Transactions on Electron Devices, vol. 69, no. 4, pp. 1736-1742. https://doi.org/10.1109/TED.2022.3150623

APA

Nisar, A., Dhull, S., Shreya, S., & Kaushik, B. K. (2022). Energy-Efficient Advanced Data Encryption System Using Spin-Based Computing-in-Memory Architecture. IEEE Transactions on Electron Devices, 69(4), 1736-1742. https://doi.org/10.1109/TED.2022.3150623

CBE

Nisar A, Dhull S, Shreya S, Kaushik BK. 2022. Energy-Efficient Advanced Data Encryption System Using Spin-Based Computing-in-Memory Architecture. IEEE Transactions on Electron Devices. 69(4):1736-1742. https://doi.org/10.1109/TED.2022.3150623

MLA

Nisar, Arshid et al. "Energy-Efficient Advanced Data Encryption System Using Spin-Based Computing-in-Memory Architecture". IEEE Transactions on Electron Devices. 2022, 69(4). 1736-1742. https://doi.org/10.1109/TED.2022.3150623

Vancouver

Nisar A, Dhull S, Shreya S, Kaushik BK. Energy-Efficient Advanced Data Encryption System Using Spin-Based Computing-in-Memory Architecture. IEEE Transactions on Electron Devices. 2022 Apr;69(4):1736-1742. doi: 10.1109/TED.2022.3150623

Author

Nisar, Arshid ; Dhull, Seema ; Shreya, Sonal et al. / Energy-Efficient Advanced Data Encryption System Using Spin-Based Computing-in-Memory Architecture. In: IEEE Transactions on Electron Devices. 2022 ; Vol. 69, No. 4. pp. 1736-1742.

Bibtex

@article{cd5f9ba353554a2587b3d593887066fc,
title = "Energy-Efficient Advanced Data Encryption System Using Spin-Based Computing-in-Memory Architecture",
abstract = "Spintronic-based computing-in-memory (CiM) architecture has emerged as one of the efficient solutions to eliminate the latency/bandwidth bottleneck of conventional von-Neumann architecture. Voltage-controlled spin-orbit torque (SOT) memory offers ultralow power and high-speed operation among the various spintronic memories. In this article, advanced encryption standard (AES) system within CiM architecture using voltage-controlled SOT device has been presented. The entire encryption process is performed within the high-density spintronic-based memory array to achieve low power and high processing speed. The reconfigurable logic operations and random key generation for AES are achieved by using a single voltage-controlled SOT device within the memory array. The results show that the proposed architecture is 96%, 52.1%, and 14% more efficient in terms of energy consumption, throughput, and area, respectively, when compared with one of the most efficient SOT-based AES systems. ",
keywords = "Advanced encryption standard (AES), computing-in-memory (CiM), spintronics, voltage-controlled SOT",
author = "Arshid Nisar and Seema Dhull and Sonal Shreya and Kaushik, {Brajesh Kumar}",
note = "Publisher Copyright: {\textcopyright} 1963-2012 IEEE.",
year = "2022",
month = apr,
doi = "10.1109/TED.2022.3150623",
language = "English",
volume = "69",
pages = "1736--1742",
journal = "IEEE Transactions on Electron Devices",
issn = "0018-9383",
publisher = "Institute of Electrical and Electronics Engineers",
number = "4",

}

RIS

TY - JOUR

T1 - Energy-Efficient Advanced Data Encryption System Using Spin-Based Computing-in-Memory Architecture

AU - Nisar, Arshid

AU - Dhull, Seema

AU - Shreya, Sonal

AU - Kaushik, Brajesh Kumar

N1 - Publisher Copyright: © 1963-2012 IEEE.

PY - 2022/4

Y1 - 2022/4

N2 - Spintronic-based computing-in-memory (CiM) architecture has emerged as one of the efficient solutions to eliminate the latency/bandwidth bottleneck of conventional von-Neumann architecture. Voltage-controlled spin-orbit torque (SOT) memory offers ultralow power and high-speed operation among the various spintronic memories. In this article, advanced encryption standard (AES) system within CiM architecture using voltage-controlled SOT device has been presented. The entire encryption process is performed within the high-density spintronic-based memory array to achieve low power and high processing speed. The reconfigurable logic operations and random key generation for AES are achieved by using a single voltage-controlled SOT device within the memory array. The results show that the proposed architecture is 96%, 52.1%, and 14% more efficient in terms of energy consumption, throughput, and area, respectively, when compared with one of the most efficient SOT-based AES systems.

AB - Spintronic-based computing-in-memory (CiM) architecture has emerged as one of the efficient solutions to eliminate the latency/bandwidth bottleneck of conventional von-Neumann architecture. Voltage-controlled spin-orbit torque (SOT) memory offers ultralow power and high-speed operation among the various spintronic memories. In this article, advanced encryption standard (AES) system within CiM architecture using voltage-controlled SOT device has been presented. The entire encryption process is performed within the high-density spintronic-based memory array to achieve low power and high processing speed. The reconfigurable logic operations and random key generation for AES are achieved by using a single voltage-controlled SOT device within the memory array. The results show that the proposed architecture is 96%, 52.1%, and 14% more efficient in terms of energy consumption, throughput, and area, respectively, when compared with one of the most efficient SOT-based AES systems.

KW - Advanced encryption standard (AES)

KW - computing-in-memory (CiM)

KW - spintronics

KW - voltage-controlled SOT

UR - http://www.scopus.com/inward/record.url?scp=85125735595&partnerID=8YFLogxK

U2 - 10.1109/TED.2022.3150623

DO - 10.1109/TED.2022.3150623

M3 - Journal article

AN - SCOPUS:85125735595

VL - 69

SP - 1736

EP - 1742

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

SN - 0018-9383

IS - 4

ER -