TY - JOUR
T1 - Energy-Efficient Advanced Data Encryption System Using Spin-Based Computing-in-Memory Architecture
AU - Nisar, Arshid
AU - Dhull, Seema
AU - Shreya, Sonal
AU - Kaushik, Brajesh Kumar
N1 - Publisher Copyright:
© 1963-2012 IEEE.
PY - 2022/4
Y1 - 2022/4
N2 - Spintronic-based computing-in-memory (CiM) architecture has emerged as one of the efficient solutions to eliminate the latency/bandwidth bottleneck of conventional von-Neumann architecture. Voltage-controlled spin-orbit torque (SOT) memory offers ultralow power and high-speed operation among the various spintronic memories. In this article, advanced encryption standard (AES) system within CiM architecture using voltage-controlled SOT device has been presented. The entire encryption process is performed within the high-density spintronic-based memory array to achieve low power and high processing speed. The reconfigurable logic operations and random key generation for AES are achieved by using a single voltage-controlled SOT device within the memory array. The results show that the proposed architecture is 96%, 52.1%, and 14% more efficient in terms of energy consumption, throughput, and area, respectively, when compared with one of the most efficient SOT-based AES systems.
AB - Spintronic-based computing-in-memory (CiM) architecture has emerged as one of the efficient solutions to eliminate the latency/bandwidth bottleneck of conventional von-Neumann architecture. Voltage-controlled spin-orbit torque (SOT) memory offers ultralow power and high-speed operation among the various spintronic memories. In this article, advanced encryption standard (AES) system within CiM architecture using voltage-controlled SOT device has been presented. The entire encryption process is performed within the high-density spintronic-based memory array to achieve low power and high processing speed. The reconfigurable logic operations and random key generation for AES are achieved by using a single voltage-controlled SOT device within the memory array. The results show that the proposed architecture is 96%, 52.1%, and 14% more efficient in terms of energy consumption, throughput, and area, respectively, when compared with one of the most efficient SOT-based AES systems.
KW - Advanced encryption standard (AES)
KW - computing-in-memory (CiM)
KW - spintronics
KW - voltage-controlled SOT
UR - http://www.scopus.com/inward/record.url?scp=85125735595&partnerID=8YFLogxK
U2 - 10.1109/TED.2022.3150623
DO - 10.1109/TED.2022.3150623
M3 - Journal article
AN - SCOPUS:85125735595
SN - 0018-9383
VL - 69
SP - 1736
EP - 1742
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 4
ER -