An Energy-Efficient DAC Switching Algorithm Based on Charge Recycling Method for SAR ADCs

Meysam Akbari, Omid Hashemipour, Fabian Khateb, Farshad Moradi

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    13 Citations (Scopus)

    Abstract

    This paper configures a successive approximation register (SAR) analog-to-digital converter (ADC) based on a new switching algorithm with efficient energy consumption. The proposed switching algorithm applies the same reference voltage to the bottom plates of all capacitors in each capacitor array to drain no energy through capacitors. In addition to a 100% energy saving in the switched-capacitor digital-to-analog converter (DAC) block, configuration of an N-bit SAR ADC shows a 50% capacitor area reduction in comparison with the conventional SAR ADC.

    Original languageEnglish
    JournalMicroelectronics Journal
    Volume82
    Pages (from-to)29-35
    Number of pages7
    ISSN0026-2692
    DOIs
    Publication statusPublished - Dec 2018

    Keywords

    • Capacitor array
    • Comparator
    • Energy-efficient
    • SAR ADC
    • Switching algorithm
    • SCHEME
    • REDUCTION

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