Optimal body biasing for maximizing circuit performance in 65nm CMOS technology

Farshad Moradi, T.V. Cao, D.T. Wisland, S. Aunet, H. Mahmoodi

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Abstract

In this paper, the effect of body-biasing technique in 65nm CMOS technology is investigated. The optimum body voltage in different process corners to get the maximum ON current is acquired using ST 65nm technology. The effectiveness of body biasing technique is investigated for sub- and super-threshold designs. We show that for higher supply voltages, there is an optimum body voltage to get the maximum performance. The results for some Flip-Flops are shown.
OriginalsprogEngelsk
TitelMidwest Symposium on Circuits and Systems
Publikationsdato1 jan. 2011
Sider4
DOI
StatusUdgivet - 1 jan. 2011
Udgivet eksterntJa

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