TY - CHAP
T1 - Optimal body biasing for maximizing circuit performance in 65nm CMOS technology
AU - Moradi, Farshad
AU - Cao, T.V.
AU - Wisland, D.T.
AU - Aunet, S.
AU - Mahmoodi, H.
PY - 2011/1/1
Y1 - 2011/1/1
N2 - In this paper, the effect of body-biasing technique in 65nm CMOS technology is investigated. The optimum body voltage in different process corners to get the maximum ON current is acquired using ST 65nm technology. The effectiveness of body biasing technique is investigated for sub- and super-threshold designs. We show that for higher supply voltages, there is an optimum body voltage to get the maximum performance. The results for some Flip-Flops are shown.
AB - In this paper, the effect of body-biasing technique in 65nm CMOS technology is investigated. The optimum body voltage in different process corners to get the maximum ON current is acquired using ST 65nm technology. The effectiveness of body biasing technique is investigated for sub- and super-threshold designs. We show that for higher supply voltages, there is an optimum body voltage to get the maximum performance. The results for some Flip-Flops are shown.
UR - http://www.scopus.com/inward/record.url?scp=80053630199&partnerID=8YFLogxK
U2 - 10.1109/MWSCAS.2011.6026651
DO - 10.1109/MWSCAS.2011.6026651
M3 - Book chapter
AN - SCOPUS:80053630199
SP - 4
BT - Midwest Symposium on Circuits and Systems
ER -