TY - GEN
T1 - Hardware Implementation of High-performance Classifiers for Edge Gateway of Smart Automobile
AU - Gaikwad, Nikhil B.
AU - Khare, Smith K.
AU - Satpute, Nitin
AU - Keskar, Avinash G.
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022/6
Y1 - 2022/6
N2 - Fog computing is a key solution for internet of things (IoT) applications, which demands operational security, real-time and power efficient intelligent responses, and low bandwidth usage. This paper introduces a novel idea related to an hardware implementation of High-performance classifiers for real-time and low power sensor data analytic on the intelligent edge gateway running on smart automobile. The high-performance classifiers uses an artificial neural network (ANN) to extract conclusive inferences from the raw automotive sensors information. The multiple classifiers are embedded into a re-configurable ANN hardware deign i.e. intellectual property core (IP core) which implemented and tested using field-programmable gate array fabric. In addition, this work studies the effect of the IP cores on the performance of the edge gateway. The implementation of fog/edge computing enables throughput reduction of 96.78% to 98.75% compared with the traditional gateway. The hardware design of the high-performance classifiers IP core requires only 31μ s and power consumption of 124mW for classification. The concept of re-configurable ANN model reduce about 41% to 93% of hardware resources requirement that contributing to reduced system power and cost.
AB - Fog computing is a key solution for internet of things (IoT) applications, which demands operational security, real-time and power efficient intelligent responses, and low bandwidth usage. This paper introduces a novel idea related to an hardware implementation of High-performance classifiers for real-time and low power sensor data analytic on the intelligent edge gateway running on smart automobile. The high-performance classifiers uses an artificial neural network (ANN) to extract conclusive inferences from the raw automotive sensors information. The multiple classifiers are embedded into a re-configurable ANN hardware deign i.e. intellectual property core (IP core) which implemented and tested using field-programmable gate array fabric. In addition, this work studies the effect of the IP cores on the performance of the edge gateway. The implementation of fog/edge computing enables throughput reduction of 96.78% to 98.75% compared with the traditional gateway. The hardware design of the high-performance classifiers IP core requires only 31μ s and power consumption of 124mW for classification. The concept of re-configurable ANN model reduce about 41% to 93% of hardware resources requirement that contributing to reduced system power and cost.
KW - Artificial neural network
KW - Edge gateway
KW - Field Programmable Gate Array
KW - high-performance classifiers IP core
KW - Re-configurable artificial neural network
KW - Smart automobile
UR - http://www.scopus.com/inward/record.url?scp=85134385285&partnerID=8YFLogxK
U2 - 10.1109/PCEMS55161.2022.9808049
DO - 10.1109/PCEMS55161.2022.9808049
M3 - Article in proceedings
AN - SCOPUS:85134385285
T3 - Proceedings of PCEMS 2022 - 1st International Conference on the Paradigm Shifts in Communication, Embedded Systems, Machine Learning and Signal Processing
SP - 74
EP - 77
BT - Proceedings of PCEMS 2022 - 1st International Conference on the Paradigm Shifts in Communication, Embedded Systems, Machine Learning and Signal Processing
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 1st International Conference on the Paradigm Shifts in Communication, Embedded Systems, Machine Learning and Signal Processing, PCEMS 2022
Y2 - 6 May 2022 through 7 May 2022
ER -