TY - JOUR
T1 - A New Symmetrical Source-Based DC/AC Converter with Experimental Verification
AU - Mahto, Kailash Kumar
AU - Mahato, Bidyut
AU - Chandan, Bikramaditya
AU - Das, Durbanjali
AU - Das, Priyanath
AU - Fotis, Georgios
AU - Vita, Vasiliki
AU - Mann, Michael
N1 - Publisher Copyright:
© 2024 by the authors.
PY - 2024/5
Y1 - 2024/5
N2 - This research paper introduces a new topology for multilevel inverters, emphasizing the reduction of harmonic distortion and the optimization of the component count. The complexity of an inverter is determined by the number of power switches, which is significantly reduced in the presented topology, as fewer switches require fewer driver circuits. In this proposed topology, a new single-phase generalized multilevel inverter is analyzed with an equal magnitude of voltage supply. A 9-level, 11-level, or 13-level symmetrical inverter with RL load is analyzed in MATLAB/Simulink 2019b and then experimentally validated using the dSPACE-1103 controller. The experimental verification of the load voltage and current with different modulation indices is also presented. The analysis of the proposed topology concludes that the total required number of components is lower than that necessary for the classical inverter topologies, as well as for some new proposed multilevel inverters that are also compared with the proposed topology in terms of gate driver circuits, power switches, and DC sources, which thereby enhances the goodness of the proposed topology. Thus, a comparison of this inverter with the other topologies validates its acceptance.
AB - This research paper introduces a new topology for multilevel inverters, emphasizing the reduction of harmonic distortion and the optimization of the component count. The complexity of an inverter is determined by the number of power switches, which is significantly reduced in the presented topology, as fewer switches require fewer driver circuits. In this proposed topology, a new single-phase generalized multilevel inverter is analyzed with an equal magnitude of voltage supply. A 9-level, 11-level, or 13-level symmetrical inverter with RL load is analyzed in MATLAB/Simulink 2019b and then experimentally validated using the dSPACE-1103 controller. The experimental verification of the load voltage and current with different modulation indices is also presented. The analysis of the proposed topology concludes that the total required number of components is lower than that necessary for the classical inverter topologies, as well as for some new proposed multilevel inverters that are also compared with the proposed topology in terms of gate driver circuits, power switches, and DC sources, which thereby enhances the goodness of the proposed topology. Thus, a comparison of this inverter with the other topologies validates its acceptance.
KW - DC/AC power converters
KW - multilevel inverter
KW - pulse width modulation
KW - total harmonic distortion (THD)
UR - http://www.scopus.com/inward/record.url?scp=85194147913&partnerID=8YFLogxK
U2 - 10.3390/electronics13101975
DO - 10.3390/electronics13101975
M3 - Journal article
AN - SCOPUS:85194147913
SN - 2079-9292
VL - 13
JO - Electronics
JF - Electronics
IS - 10
M1 - 1975
ER -