Abstract
This paper presents a low-power instrumentational amplifier (IA) design for EEG signal acquisition for seizure detection. The proposed structure provides a power per channel of 0.92 μW at supply voltage of 0.8 V. Due to the use of buffer structures and impedance boosting loops in the proposed design, the input impedance has reached up to 160 G and 16 G at 1 Hz and 10 Hz frequencies, respectively. Also, the use of design and chopping techniques will lead to an input-referred noise of 1.7 μVrms over the bandwidth of 0.5-100 Hz with a noise efficiency factor (NEF) of 3.87 and a CMRR of 137 dB. The simulations are done using TSMC 180nm CMOS technology at the supply voltage of 0.8 V.
| Originalsprog | Engelsk |
|---|---|
| Titel | 2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016 : VLSI-SoC |
| Antal sider | 6 |
| Vol/bind | 2016 |
| Forlag | IEEE Press |
| Publikationsdato | 22 nov. 2016 |
| Artikelnummer | 7753541 |
| ISBN (Elektronisk) | 978-1-5090-3561-8 |
| DOI | |
| Status | Udgivet - 22 nov. 2016 |
| Begivenhed | 2016 IFIP/IEEE International Conference on Very Large Scale Integration - Tallinn, Estland Varighed: 26 sep. 2016 → 28 sep. 2016 |
Konference
| Konference | 2016 IFIP/IEEE International Conference on Very Large Scale Integration |
|---|---|
| Land/Område | Estland |
| By | Tallinn |
| Periode | 26/09/2016 → 28/09/2016 |