Institut for Forretningsudvikling og Teknologi

Ramjee Prasad

Convolutional Encoder and Viterbi Decoder Using SOPC For Variable Constraint Length

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  • Anuradha Kulkarni, Indien
  • Mantri Dnyaneshwar, Danmark
  • Neeli R. Prasad
  • ,
  • Ramjee Prasad
Convolution encoder and Viterbi decoder are the basic and important blocks in any Code Division Multiple Accesses (CDMA). They are widely used in communication system due to their error correcting capability But the performance degrades with variable constraint length. In this context to have detailed analysis, this paper deals with the implementation of convolution encoder and Viterbi decoder using system on programming chip (SOPC). It uses variable constraint length of 7, 8 and 9 bits for 1/2 and 1/3 code rates. By analyzing the Viterbi algorithm it is seen that our algorithm has a better error rate for ½ code rates than 1/3. The reduced bit error rate with increasing constraint length shows an increase in efficiency and better utilization of resources as bandwidth and power.
OriginalsprogEngelsk
Titel2013 IEEE 3rd International Advance Computing Conference (IACC) : IACC2013
UdgivelsesstedAKGEC, Ghaziabad, INDIA
ForlagIEEE
Udgivelsesår23 feb. 2013
Sider1651-1655
ISBN (trykt)978-1-4673-4527-9
DOI
StatusUdgivet - 23 feb. 2013
Eksternt udgivetJa
Begivenhed3rd IEEE International Advance Computing Conference (IACC-2013) - Ghaziabad, Indien
Varighed: 22 feb. 201323 feb. 2013

Konference

Konference3rd IEEE International Advance Computing Conference (IACC-2013)
LandIndien
ByGhaziabad
Periode22/02/201323/02/2013

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