Aarhus Universitets segl

Jalil Boudjadar


Jalil Boudjadar
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I'm an Associate Professor within the Department of Electrical and Computer Engineering. I am also a member of the DIGIT research centre. I received my M.Sc degree in June 2008 from Limoges University, and my Ph.D in December 2012 from Toulouse University, France.  


My research interests include:

  • Design, validation and optimization of embedded systems.
  • Modeling and intelligent control for cyber physical systems.
  • Digitization, digital twins and adaptive runtime engineering
  • Machine learning and emboddied artifical intelligence.
  • Real-time systems and scheduling theories.
  • Formal methods for security, safety and data analysis

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